The present technology relates to a semiconductor device including a plurality of semiconductor substrates on which a high-frequency circuit is formed, the high-frequency circuits of the respective semiconductor substrates being electrically connected to each other.
While the miniaturization of elements in semiconductor devices made progress so far, the miniaturization has recently become difficult due to the diffraction limit of photolithography.
Accordingly, for further integration, an attempt has been made to improve an effective degree of integration by three-dimensionally laminating and integrating a plurality of semiconductor chips.
In addition to a configuration obtained by laminating circuit elements of a same kind as a constitution obtained by laminating a plurality of semiconductor chips, an attempt has been made to compound different functions into one chip by laminating circuit elements of different kinds such for example as an arithmetic circuit chip and a memory circuit chip. Compounding such different functions can not only improve the degree of integration but also improve functionality.
When a high-frequency circuit is used as a circuit element to be laminated, and the high-frequency circuit is laminated to another circuit element or another high-frequency circuit, the chip can be provided with a communicating function, or signals of various frequencies can be handled on one chip.
In addition, because the size of circuit parts of a high-frequency circuit is determined by the operating frequency of the high-frequency circuit, it is difficult to improve the degree of integration of the high-frequency circuit by miniaturization. It is therefore desirable to improve the degree of integration of high-frequency circuit elements by laminating the high-frequency circuit elements three-dimensionally. Improving the degree of integration of high-frequency circuit elements can enhance the performance of the high-frequency circuit elements.
When two semiconductor substrates on which a high-frequency circuit is formed are laminated to each other, a conductor for connection needs to be formed to connect the high-frequency circuits of the respective semiconductor substrates to each other.
Typical transmission lines of high-frequency circuits formed on semiconductor substrates include microstrip lines and coplanar lines. Other transmission lines include coaxial lines and strip lines.
These transmission lines of the high-frequency circuits have a ground for a signal line, and transmit electromagnetic waves by respective conductors of the signal line and the ground.
However, when the transmission lines of the respective high-frequency circuits are simply connected to each other by conductor layers within via holes (which conductor layers will hereinafter be referred to as “via layers), electromagnetic waves are radiated from the via layer connecting the signal lines of the transmission lines to each other, and may affect the operation of a peripheral circuit.
Accordingly, strengthening a ground in a connecting part connecting the transmission lines of the respective high-frequency circuits to each other has been proposed to suppress the radiation of electromagnetic waves to the outside of the transmission lines.
For example, S. W. Ho et al., IEEE ECTC 2008, 27 May to 30 May 2008, p. 1946 referred to as Non-Patent Document 1 hereinafter proposes a constitution in which a coplanar line formed on an upper surface of a semiconductor substrate on a lower side and a coplanar line formed on an upper surface of a semiconductor substrate on an upper side are connected to each other by using via layers of a coaxial structure penetrating the semiconductor substrate on the upper side. In this constitution, a ground is strengthened by arranging the via layers of the coaxial structure such that the via layer connected to ground lines is disposed so as to surround the via layer connected to signal lines.
In addition, for example, Japanese Patent Laid-Open No. 2004-363975 (referred to as Patent Document 1 hereinafter) discloses a constitution in which the signal line of a coplanar line formed on a lower surface of a semiconductor substrate and the signal line of a coplanar line formed on an upper surface of the semiconductor substrate are connected to each other by a via layer penetrating the semiconductor substrate.
The constitution disclosed in Patent Document 1 strengthens a ground by further extending a ground conductor from each of the coplanar lines and also forming a ground conductor on the periphery of a connecting part connecting the via layer to the signal lines and on an opposite side of the semiconductor substrate from each of the coplanar lines.
Without being limited to semiconductor devices including high-frequency circuits, consideration has been given also to three-dimensional lamination of a plurality of semiconductor substrates in ordinary semiconductor devices.
For example, a constitution in which circuits formed on two respective semiconductor substrates are connected to each other by using via layers has been proposed (see Japanese Patent Laid-Open No. 2010-245506 referred to as Patent Document 2 hereinafter, for example).
In the constitution of Patent Document 2, a plurality of kinds of via layers having different depths which via layers penetrate the semiconductor substrates and insulating layers between the two semiconductor substrates are formed, and the circuits formed on the two respective semiconductor substrates are connected to each other by using the plurality of kinds of via layers.